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 STT5NF30L
N-CHANNEL 30V - 0.039 - 4A SOT23-6L STripFETTMII POWER MOSFET
TYPE STT5NF30L VDSS 30 V RDS(on) < 0.050 (@ 10V) ID 4A
TYPICAL RDS(on) = 0.039 @10V LOW Qg LOW THRESHOLD DRIVE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique "Single Feature SizeTM" strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.
SOT23-6L
APPLICATIONS DC-DC CONVERTERS POWER MANAGEMENT IN PORTABLE/ DESKTOP PCs SYNCHRONOUS RECTIFICATION DC MOTOR CONTROL (DISK DRIVERS, etc)
INTERNAL SCHEMATIC DIAGRAM
ORDERING INFORMATION
SALES TYPE STT5NF30L MARKING STFN PACKAGE SOT23-6L PACKAGING TAPE & REEL
March 2003
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ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT EAS (1) Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Single Pulse Avalanche Energy Value 30 30 16 4 2.5 16 1.6 50 Unit V V V A A A W mJ
(*)Pulse width limited by safe operating area (1) Starting Tj =25C, Id = 2 A, VDD = 15V.
THERMAL DATA
Rthj-amb Tl Tstg Thermal Resistance Junction-ambient Max. Operating Junction Temperature Storage Temperature Max 78 - 55 to 150 - 55 to 150 C/W C C
ON/OFF
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125C VGS = 16V VDS = VGS, ID = 250 A VGS = 10 V, ID = 2 A VGS = 5 V, ID = 2 A 1 0.039 0.046 0.050 0.060 Min. 30 1 10 100 Typ. Max. Unit V A A A V
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STT5NF30L
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS = 10 V , ID = 2 A VDS = 25 V, f = 1 MHz, VGS = 0 Min. Typ. 3 330 90 40 Max. Unit S pF pF pF
SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15 V, ID = 2 A RG = 4.7 VGS = 4.5 V (see test circuit, Figure 3) VDD = 24 V, ID = 4 A, VGS = 5 V Min. Typ. 11 100 6.5 3.6 2 9 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf Parameter Turn-Off Delay Time Fall Time Test Conditions VDD = 15 V, ID = 2 A, RG = 4.7, VGS = 4.5 V (see test circuit, Figure 5) Min. Typ. 25 22 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 4 A, VGS = 0 ISD = 4 A, di/dt = 100 A/s, VDD = 20 V, Tj = 150C (see test circuit, Figure 5) 35 25 14 Test Conditions Min. Typ. Max. 4 16 1.2 Unit A A V ns nC A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
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STT5NF30L
Safe Operating Area Thermal Impedence Junction-PCB
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
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Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
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STT5NF30L
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STT5NF30L
SOT23-6L MECHANICAL DATA
mm MIN. A A1 A2 b C D E E1 L e e1 0.90 0.00 0.90 0.25 0.09 2.80 2.60 1.50 0.35 0.95 1.90 TYP. MAX. 1.45 0.15 1.30 0.50 0.20 3.10 3.00 1.75 0.55 MIN. 0.035 0.000 0.035 0.010 0.004 0.110 0.102 0.059 0.014 0.037 0.075 mils TYP. MAX. 0.057 0.006 0.051 0.020 0.008 0.122 0.118 0.069 0.022
DIM.
A A2 A1 b e1 e c L E
D
E1
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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